Mapping a Circuit Onto a Multiprocessor Architecture for Simulation Purposes

Circuit simulation is an important step in electronic circuit design. Using a configurable architecture to speed up simulation is known to result in more timely outcomes. This paper aims at studying how to map circuits onto such a computer architecture using genetic algorithms. These algorithms are used in many applications relating to circuit design such as circuit partitioning, VLSI layout placement and routing, as well as hardware/software co-synthesis. The use of genetic algorithms to decide about how the mapping process should be done has been suggested elsewhere and is exploited here. In this paper it will be presented how the algorithms have been implemented, and the result of testing procedures conducted on them.